The present invention relates generally to electronic circuits such as integrated circuits, and more particularly to voltage regulators in such circuits.
Voltage regulators, particularly low-dropout voltage regulators, typically use digital calibration engines to tune the regulators and account for process, voltage, and temperature (PVT) related variations in the regulated output voltage. Despite the foregoing, an extreme PVT condition may place a FET driver on the regulator output in a deep linear region of operation instead of the desired saturation region. Operating in a deep linear region results significant PVT sensitivity and poor voltage regulation.